Microsoft Unveils Maia 300 With 288GB of HBM4 and a 96-Chip Rack, Claiming Up to Seven Times Maia 200 Throughput
The third-generation in-house accelerator moves to a 2-nanometre-class process and liquid-cooled racks of 96 chips, but Microsoft compares it only with its own previous part, not with Nvidia.
Outspoken Digest Technology Desk
Tuesday, October 13, 2026/2 min read
Microsoft has taken the wraps off Maia 300, the third generation of its in-house AI accelerator, and the headline numbers are about memory and rack density. In a post on the Azure blog on 12 October, Rani Borkar and Saurabh Dighe describe a chip designed to maximise "useful tokens per watt and useful tokens per dollar" for running trained models.
The company says the chip's compute dies are made on TSMC's N2P process, in a multi-chiplet design that puts memory control and input and output on separate dies. Each accelerator carries eight stacks of HBM4 memory for 288GB of capacity and 18TB per second of bandwidth.
What is new compared with Maia 200?
Every comparison Microsoft publishes is against Maia 200, the 3-nanometre part it introduced in January. Compute throughput is up 36 percent, memory bandwidth is 2.5 times higher, and capacity is up by a third. At the rack level, Microsoft claims up to 7 times the token throughput and more than 2.5 times the performance per watt in the full 96-accelerator configuration.
The rack itself is the other story. Ninety-six accelerators sit in 24 trays in a 167 kilowatt rack, double the density of Maia 200. More than 80 percent of the heat is removed by liquid cooling, and power arrives over a 50 volt busbar with dual feeds.
The design also changes how memory is organised. Maia 300 moves from uniform memory access to a NUMA-style layout across its chiplets, and adds enhanced MXFP4 and sub-3-bit storage formats, which pack model weights into fewer bits so more of a model fits in fast memory.
How do the chips connect?
Networking uses a custom transport over Ethernet. Inside a rack, accelerator pairs are linked directly and a switched fabric joins all 96. An optical second tier links up to 128 racks into a "superpod" of 12,288 accelerators, with up to 750GB per second to any peer depending on how a job is placed.
Does it change the Nvidia picture?
Not on the evidence published so far. The blog does not name or benchmark any rival accelerator, so there is no like-for-like figure against Nvidia, Google or Amazon silicon. What it does show is intent. Reuters, citing The Information, reported in August that Microsoft was negotiating with TSMC for capacity to make more than 300,000 Maia 300 units for delivery in 2027, and aims eventually to secure capacity for more than a million. Those figures were reported, not confirmed by Microsoft, which said at the time that they did not reflect the program's scale.
Microsoft has trailed Alphabet and Amazon in scaling its own chips, a gap it hopes to close to reduce dependence on Nvidia. The things to watch now are real: how many Maia 300 racks reach Azure regions, which of Microsoft's own services run on them first, and whether independent benchmarks ever appear to test the seven-times claim.
Published in The Outspoken Digest
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